Logic Synthesis Using FPGAs CpE 447
 

 

Course Description

 

Logic design using textual design entry, VHDL. Behavioral, structural and data flow descriptions. Technology-dependent vs. technology-independent design. CPLD, SEAM and antifuse technologies. Rapid prototyping and retargeting designs. A major design project.

Prerequisite

 

3 lecture hours
3 semester hours