University of Bridgeport
Department of Computer Science & Engineering
Prof. Khaled M. Elleithy
Office: Tech building, Room 229
Telephone: (203) 576-4703
Email: elleithy@bridgeport.edu
1. Introduction to Computer Organization: CPU, Memory, IO devices,
instruction execution and flow of information. Computer Communication Architecture.
(Section 1.1 and other general information).
2.Binary Systems: Binary numbers, Number Base conversion, Complement,
Codes, signed binary numbers (Section 1.2-1.6).
3. Boolean Algebra and Logic Gates: Axiomatic definitions of
Boolean algebra, basic theorems and properties of Boolean algebra, Boolean
functions, canonical and standard forms, other logic operations. Digital logic
gates (Section 2.1-2.3).
4. Simplification of Boolean Functions: The map method, two and
three variable maps, Four-variable Map, Simplification into sum-of-products,
product-of-sums, NAND and NOR implementation, other 2-level implementations.
Don't-Care Conditions (Sections 2.4-2.7 only).
5. Combinational Logic: Introduction, Design procedure, Analysis Procedure
(Section 3.1-3.4).
6. Combinational Logic with MSI and LSI: Introduction. Binary adder
and subtractor, Decimal adder, Magnitude comparator, Decoders and Encoders.
Multiplexers (3.5-3.12).
7. HDL Representations: VHDL: Structural description, Dataflow
description, Hierarchical description, behavioral description (3.13 plus
handouts)
8. Synchronous Sequential Logic: Introduction. Flip-flops, Triggering of
flip-flops, Characteristic table. Analysis of clocked sequential circuits.
State assignment. Flip-flop excitation tables. Design procedure. (4.1 -
4.8) (Examples of designing state
machines from verbal descriptions will be given as class notes and handout).
9. Registers, Counters and Register Transfer: Introduction, Registers,
Shift & Multi-Mode Registers, Synchronous Counters, Register Transfer
Operations (Sections 5.1-5.7).
10. ROMs and PLAs: ROMs, PLAs, and PALs (Sections 6.6-6.9).
Quizzes 35 % (There is a quiz every week, worst two will be dropped, no makeup) Lab and project 15 % (Project presentations December 3rd and 5th)Exam1 20 % (Thursday, October 17th , class time)Exam2 30 % (Thursday, Nov 28th , class time)