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  1. K. M. Elleithy and Tarek Sobh, “Wireless LAN Laboratory,” National Science Foundation (NSF), Proposal, June 2001.
  2. K. M. Elleithy, “Mobile Content Manager,” United Nations Development Program (UNDP), Transfer of Knowledge through Expatriate Nationals (TOTKEN), Proposal, July 2001.
  3. M. A Aref, K. M. Elleithy, T. Sobh,  “Developing an Intelligence Web Based Expert System for Anemia Diagnosis and Categorization” U. S. Egypt Joint Board on Scientific and Technological Cooperation, Proposal, October 2001.
  4. K. Altawil and Khaled M Elleithy, “Security Implementation and Evaluation of Armco Enterprise Network,” Saudi Aramco, Final report, May 2000.
  5. K. Altawil and Khaled M Elleithy, “Security Implementation and Evaluation of Armco Enterprise Network,” Saudi Aramco, First report, May 1999.
  6. K. Altawil and Khaled M Elleithy, “Security Implementation and Evaluation of Armco Enterprise Network,” Saudi Aramco, Proposal, January 1999.
  7. K. M. Elleithy and A. A. Amin, “A Formal Methodology for Parallel VLSI Algorithm Design,” King Abdulaziz City of Science and Technology, Final report, AR-13-11, March 1996.
  8. K. M. Elleithy and A. A. Amin, “A Formal Methodology for Parallel VLSI Algorithm Design,” King Abdulaziz City of Science and Technology, progress report #5, AR-13-11, June 1995.
  9. K. M. Elleithy and A. A. Amin, “A Formal Methodology for Parallel VLSI Algorithm Design,” King Abdulaziz City of Science and Technology, progress report #4, AR-13-11, January 1995.
  10. K. M. Elleithy and A. A. Amin, “A Formal Methodology for Parallel VLSI Algorithm Design,” King Abdulaziz City of Science and Technology, progress report #3, AR-13-11, June 1994.
  11. K. M. Elleithy and M. A. Aref, “A Production System Based Environment for Formal Hardware Verification,” King Abdulaziz City of Science and Technology, proposal report, AR-15-63, January 1994.
  12. M. A. Barr, M. Y. Osman, S. H. Juwad, S. M. Sait, M. S. Benten, and K. M. Elleithy, “An Integrated Framework for Synthesis, Verification, Optimization, and Testability of VLSI-Based Design,” King Abdulaziz City of Science and Technology, proposal report, AR-15-74, January 1994.
  13. K. M. Elleithy and A. A. Amin, “A Formal Methodology for Parallel VLSI Algorithm Design,” King Abdulaziz City of Science and Technology, progress report #2, AR-13-11, January 1994.
  14. K. M. Elleithy and A. A. Amin, “A Formal Methodology for Parallel VLSI Algorithm Design,” King Abdulaziz City of Science and Technology, progress report #1, AR-13-11, July 1993.
  15. K. M. Elleithy and A. A. Amin, “A Formal Methodology for Parallel VLSI Algorithm Design,” King Abdulaziz City of Science and Technology, proposal report, AR-13-11, July 1991.
  16. K. M. Elleithy, “Formalization of High Level Synthesis,”VLSI Technical Report TR 89-8-2, The Center for Advanced Computer Studies, University of Southwestern Louisiana, 1989.
  17. K. M. Elleithy, “Optimization of SQL queries” The Center for Advanced Computer Studies, University of South Western Louisiana, Project Report, May 88.
  18. K. M. Elleithy, “Emulating the Instruction Set of a Simple Computer,” The Center for Advanced Computer Studies, University of South Western Louisiana, Project Report, December 1987.
  19. K. M. Elleithy, “On bit-Parallel Implementation for the Chinese Remainder Theorem,” VLSI Technical Report TR 87-8-1, The Center for Advanced Computer Studies, University of Southwestern Louisiana, 1987.
  20. K. M. Elleithy, “Parallel Implementation of Searching Algorithms,” The Center for Advanced Computer Studies, University of South Western Louisiana, project report, May 1987.
  21. K. M. Elleithy, “Parallel Implementation of Template Matching Algorithms,” The Center for Advanced Computer Studies, University of South Western Louisiana, project report, May 1987.
  22. K. M. Elleithy, “A Library for Scene Analysis and Image processing,” The Center for Advanced Computer Studies, University of South Western Louisiana, project report, April 1987.
  23. K. M. Elleithy, “On bit-Parallel Processing for Modulo Arithmetic,” VLSI Technical Report TR 86-8-1, The Center for Advanced Computer Studies, University of Southwestern Louisiana, 1986.
  24. K. M. Elleithy, “Simulation of a Computer Queuing Model,'”The Center for Advanced Computer Studies, University of South Western Louisiana, project report, November 1986.
  25. K. M. Elleithy, “Design and Implementation of Switching Functions Representation and Minimization Package,” The Center for Advanced Computer Studies, University of South Western Louisiana, project report, November 1986.

  • “Buffer-Overflow and Noise-Handling Model: Guaranteeing Quality of Service Routing for Wireless Multimedia Sensor Networks,” The International Conference on Engineering Technologies & Entrepreneurship 2015, Kuala Lumpur, Malaysia, 16-18 November 2015.
  • “A Multi-Layer Framework for Detection Selective Forwarding Attacks in WSNs,” The International Conference on Engineering Technologies & Entrepreneurship 2015, Kuala Lumpur, Malaysia, 16-18 November 2015.
  • “Advancing Wireless Sensor Networks Performance over Radio Trigger Wake-Up Capabilities,” CAINE-2014, 27th International Conference on Computer Applications in Industry and Engineering, New Orleans, Louisiana, October 13-15, 2014.
  • “A Dynamic Clustering Algorithm for Object Tracking and Localization in WSN,” CAINE-2014, 27th International Conference on Computer Applications in Industry and Engineering, New Orleans, Louisiana, October 13-15, 2014.
  • “Developing Network Security Protocol using Key Pre-Distribution for Wireless Sensor Network,” CAINE-2014, 27th International Conference on Computer Applications in Industry and Engineering, New Orleans, Louisiana, October 13-15, 2014.
  • “Cost Analysis of 5th Generation Technology,” CAINE-2014, 27th International Conference on Computer Applications in Industry and Engineering, New Orleans, Louisiana, October 13-15, 2014.
  • “Optimized Cooperative Localization Technique Based on Linear Intersection over Wireless Sensor Networks,” CAINE-2014, 27th International Conference on Computer Applications in Industry and Engineering, New Orleans, Louisiana, October 13-15, 2014.
  • “Steganography in Arabic Text Using Full Diacritics Text,” 25th International Conference on Computers and Their Applications in Industry and Engineering (CAINE-2012), New Orleans, Louisiana, USA, November 14 – 16, 2012.
  • “Development of OSA Event Detection Using Threshold Based Automatic Classification,”
    25th International Conference on Computers and Their Applications in Industry and Engineering (CAINE-2012),
    New Orleans, Louisiana, USA, November 14 – 16, 2012.
  • “Optimized Algorithm for Fire Detection over WSN using Micaz Motes,” 25th International Conference on Computers and Their Applications in Industry and Engineering (CAINE-2012), New Orleans, Louisiana, USA, November 14 – 16, 2012.
  • “Efficient and Optical Character Recognition Algorithm for Signature Recognition,” 25th International Conference on Computers and Their Applications in Industry and Engineering (CAINE-2012), New Orleans, Louisiana, USA, November 14 – 16, 2012.
  • “Parallel Processing for Multi Face Detection and Recognition,” 5th International Conference on Computers and Their Applications in Industry and Engineering (CAINE-2012), New Orleans, Louisiana, USA, November 14 – 16, 2012.
  • “Underwater Wireless Sensor Network Communication Using Electromagnetic Waves at Resonance Frequency 2.4 GHz,”
    15th Communications and Networking Simulation (CNS’12) Symposium, Orlando, FL, USA, March 26 – 29, 2012.
  • “A Use of Matrix with GVT Computation in Optimistic Time Warp Algorithm for Parallel Simulation,”
    15th Communications and Networking Simulation (CNS’12) Symposium, Orlando, FL, USA, March 26 – 29, 2012.
  • “Security in Wireless Sensor Networks: Key Intrusion Detection Module in SOOAWSN,” 14th Communications and Networking Simulation (CNS’11) Symposium, Boston, April 4 – 7, 2011.
  • “A Generic Optimized Time Management Algorithms (OTMA), Framework for Simulating Large-Scale Overlay Networks,”
    14th Communications and Networking Simulation (CNS’11) Symposium, Boston, April 4 – 7, 2011.
  • “Transformation Matrix Algorithm for Reducing the Computational Complexity of Multiuser Receivers for DS-CDMA Wireless Systems,” Wireless Telecommunication Symposium (WTS 2007), Pomona, California, April 26-28, 2007.
  • “Implementations of Location Awareness Technologies and their Applications” Wireless Telecommunication Symposium (WTS 2007), Pomona, California, April 26-28, 2007.
  • “Implementation and Comparison Of Denial Of Service Attack Techniques”, the 8th World Multiconference on Systemics, Cybernetics and Informatics (SCI 2004), Orlando, USA, July 18-21, 2004.
  • “A Framework for Reverse Engineering VLSI Chips,” IFAC Conference on Intelligent Control and Signal Processing, Portugal, April 2003.
  • “Support of a Banking System Using WAP,” The 6th World Multiconference on systemics, cybernetics, and Informatics, Orlando, USA, July 14-18, 2002.
  • “Simulation and Improvement of IMT2000 Power Control,” The 6th World Multiconference on systemics, cybernetics, and Informatics, Orlando, USA, July 14-18, 2002.
  • “E-commerce” Public Lecture organized by Royal Commission at Jubail, Saudi Arabia, Dec. 1999.
  • ” Area Estimation for DSP Algorithms,” IEEE Workshop on SiGNAL PROCESSING SYSTEMS (SiPS) Design and Implementation, Lafayette, Louisiana, October 11-13, 2000.
  • “E-commerce” Saudi Internet 98 Meeting, Riyadh, Dec. 5-7, 1999
  • “A Genetic Algorithm for Register Allocation” 9th great lake Symposium on VLSI, Michigan, March 1999.
  • “A Simulated Annealing Algorithm for Register Allocation,”Fifth Saudi Engineering Conference, March 1999
  • “Net Security” Information Technology Center Internal Seminar for ITC Staff, Dhahran, Saudi Arabia, Nov. 1998.
  • “Internet/Intranet for Business” Dhahran 15th Annual Computer, Communication & Office Technology Exhibition, Oct.
    17-22, 1998.
  • “HOOVER: Hardware Object-Oriented Verification,” 8th Great Lake Symposium on VLSI, GLS’98, Lafayette, Louisiana, Feb. 1998.
  • “New Non-deterministic Approaches for Register Allocation,” 4th IEEE International Conference on Electronics, Circuits, and Systems, Cairo, Dec. 1997.
  • “HOOVER: Hardware Object-Oriented Verification,” 8th Great Lake Symposium on VLSI, GLS’98, Lafayette, Louisiana, Feb. 1998.
  • “Electronic Commerce,” Annual Computer Exhibition, KFUPM, April 1997.
  • “Formal Hardware Verification,” ICS/COE Fall Seminar Series, KFUPM, Dec. 1996.
  • “Choosing System Moduli in RNS,” ICS/COE Fall Seminar Series, Nov. 1996.
  • “Choosing System Moduli for RNS Arithmetic Processors,” 30th Annual Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, California, Nov. 3-6, 1996.
  • “Synthesis of Digital Signal Processing Algorithms from Formal Descriptions,” The Sixth International Conference on Signal Processing Applications and Technology, Boston, Oct. 24-26, 1995.
  • “An Event Logic Architecture for CIRCAL Algorithms,” The Seventh IASTED International Conference on Parallel and Distributed Computing and Systems, Washington, D. C., Oct. 18-21, 1995.
  • “An Integer Programming Approach for Choosing the System Moduli for RNS Processor,” Minisymposium on Optimization Theory and Applications, KFUPM, Dhahran, May 30, 1995.
  • “Formal Verification of DSP VLSI Architectures,” International Conference on Electronics, Circuits and Systems, Cairo,
    Egypt, Dec. 19-22, 1994.
  • “Formal Environments for Parallel Hardware Description Languages,” International Conference on Electronics, Circuits and Systems, Cairo, Egypt, Dec. 19-22, 1994.
  • “Formal Verification of DSP VLSI Architectures: A Tutorial” 37th Midwest Symposium on Circuits and Systems, Lafayette, Louisiana, August 3-5, 1994.
  • “A Rule-based Approach for High Speed Adders Design Verification,” 37th Midwest Symposium on Circuits and Systems,
    Lafayette, Louisiana, August 3-5, 1994.
  • “A Transputer Based Sonar Range finding,” Workshop on Optimization and Parallel Computation, Al-Ain, United Arab Emirates, May 8-11, 1994.
  • “A Characteristic Model for Formal Parallel Hardware Description Languages,” Workshop on Optimization and Parallel
    Computation, Al-Ain, United Arab Emirates, May 8-11, 1994.
  • “Formal Hardware Verification of VLSI Architecture Current Status and Future Directions,” Fifth International Conference on Microelectronics, Dhahran, Saudi Arabia, Dec. 1993.
  • “A Production Based System for Formal Verification of Digital Signal Processing Architectures,” Twenty-Seventh Annual
    Asilomar Conference on Signals, Systems and Computers, Pacific Grove, California, Nov. 1993.
  • “PLORA: A Prolog and LISP oriented RISC Architecture,”Ein Shams University, Cairo, April 1993.
  • “RISC Architectures,” Information & Computer Science Department Spring Lecture Series, King Fahd University, May
    1992.
  • “Foundations of Hardware Design Correctness,” Computer Engineering Department, King Fahd University, December 1991.
  • “A Massively Parallel RNS Architecture,” 25th Asilomar Conference on Circuit and Systems, Pacific Grove, California, Nov. 1991.
  • “Formal High Level Synthesis,” Computer Engineering Department, King Fahd University, December 1990.
  • “Synthesizing DSP Architectures from Behavioral Specifications: A Formal Approach,” 1990 IEEE International Symposium for Circuits and Systems, New Orleans, May 1990.
  • “Formalizing Behavioral Specifications Synthesis,” Louisiana State University, Louisiana, April 1990.
  • “A Framework for High Level Synthesis of Digital Architectures from U-recursive Algorithms,” ACM Eighteenth Annual
    Computer Science Conference, Washington D. C., Feb. 1990.
  • “Efficient Implementations of the Chinese Remainder Theorem,” Computer Science and Automatic Control Department, Alexandria University, July 1989.
  • “A Systolic Machine for Relational Database and Hashing,” Third Annual Parallel Processing Symposium, Los Angles, Mar. 1989.
  • “Residue Arithmetic: Parallelism at the Algorithmic Level,” The Center for Advanced Computer Studies, University of Southwestern Louisiana, November 1987.